/* Copyright Statement:
 *
 * This software/firmware and related documentation ("AutoChips Software") are
 * protected under relevant copyright laws. The information contained herein is
 * confidential and proprietary to AutoChips Inc. and/or its licensors. Without
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 * reproduction, modification, use or disclosure of AutoChips Software, and
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 * prohibited.
 *
 * AutoChips Inc. (C) 2024. All rights reserved.
 *
 * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
 * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("AUTOCHIPS SOFTWARE")
 * RECEIVED FROM AUTOCHIPS AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
 * ON AN "AS-IS" BASIS ONLY. AUTOCHIPS EXPRESSLY DISCLAIMS ANY AND ALL
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 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
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 * AUTOCHIPS SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
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 */
/******************************************************************************
 * @version: V3.1.0  AC7840x  Demo
 ******************************************************************************/

#ifndef __AC784X_FLASH_DEV_H__
#define __AC784X_FLASH_DEV_H__
#ifdef __cplusplus
extern "C" {
#endif

#include "stdint.h"

#define PFLASH_START_ADDR       0x00000000
#define PFLASH_END_ADDR         0x000FFFFF
#define PFLASH_PAGE_SIZE        0x800
#define PFLASH_WRITE_UNIT_SIZE  0x08
    
#ifdef __cplusplus
#define   	__I     volatile             /*!< Defines 'read only' permissions */
#else
#define   	__I     volatile const       /*!< Defines 'read only' permissions */
#endif
#define     __O     volatile             /*!< Defines 'write only' permissions */
#define     __IO    volatile             /*!< Defines 'read / write' permissions */

/* following defines should be used for structure members */
#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */

typedef struct {                                /*!< (@ 0x40002000) FLASH Structure                                            */
    __IOM uint32_t  STAT;                         /*!< (@ 0x00000000) Flash status register                                      */
    __IM  uint32_t  SEC;                          /*!< (@ 0x00000004) MCU secure register                                        */
    __IOM uint32_t  CSESTAT;                      /*!< (@ 0x00000008) CSE status register                                        */
    __IOM uint32_t  KEYUNLK;                      /*!< (@ 0x0000000C) Flash unlock register                                      */
    __IOM uint32_t  CNFG;                         /*!< (@ 0x00000010) Flash configure register                                   */
    __IOM uint32_t  CMD;                          /*!< (@ 0x00000014) Flash command ID register                                  */
    __IOM uint32_t  ADDR;                         /*!< (@ 0x00000018) Flash address register                                     */
    __IOM uint32_t  DATA0;                        /*!< (@ 0x0000001C) Flash data register 0                                      */
    __IOM uint32_t  DATA1;                        /*!< (@ 0x00000020) Flash data register 1                                      */
    __IOM uint32_t  LEN;                          /*!< (@ 0x00000024) Flash length register                                      */
    __IM  uint32_t  RESERVED[2];
    __IOM uint32_t  CST;                          /*!< (@ 0x00000030) Flash command start register                               */
    __IOM uint32_t  PPROT;                        /*!< (@ 0x00000034) P-Flash write protection register                          */
    __IOM uint32_t  DPROT;                        /*!< (@ 0x00000038) D-Flash write protection register                          */
    __IOM uint32_t  EPROT;                        /*!< (@ 0x0000003C) eMemory write protection register                          */
    __IOM uint32_t  DFADR;                        /*!< (@ 0x00000040) Flash ECC 2-bit error address register                     */
    __IM  uint32_t  RESERVED1;
    __IM  uint32_t  PART;                         /*!< (@ 0x00000048) eMemory partition information register                     */
} FLASH_Type;

/*!
 * @brief FLASH command.
 */
typedef enum
{
    FLASH_ERASE_PAGE                    = 0x01U,    /*!< FLASH page erase command */
    FLASH_ERASE_BLOCK                   = 0x02U,    /*!< FLASH block erase command */
    FLASH_WRITE_PROTECT_ERASE           = 0x03U,    /*!< FLASH write protection erase command */
    FLASH_ERASE_ALL_BLOCK               = 0x04U,    /*!< FLASH erase all block erase command */
    FLASH_PROGRAM_PHRASE                = 0x10U,    /*!< FLASH program command */
    FLASH_PROGRAM_SECTION               = 0x11U,    /*!< FLASH section prigram command */
    FLASH_PROGRAM_ONCE                  = 0x12U,    /*!< FLASH once field program command */
    FLASH_VERIFY_SECTION                = 0x20U,    /*!< FLASH verify section command */
    FLASH_VERIFY_BLOCK                  = 0x21U,    /*!< FLASH block verify command */
    FLASH_VERIFY_ALL_BLOCK              = 0x22U,    /*!< FLASH all block verify command */
    FLASH_SECURITY_BY_PASS              = 0x23U,    /*!< FLASH bypass security command */
    FLASH_ERASE_PARTITION               = 0x30U,    /*!< FLASH erase partition command */
    FLASH_PROGRAM_PARTITION             = 0x31U,    /*!< FLASH program partition command */
    FLASH_SET_FLEXRAM                   = 0x32U,    /*!< FLASH set flexRAM function command */
} flash_command_t;

typedef enum
{
    STATUS_SUCCESS                         = 0x000U,    /*!< Generic operation success status */
    STATUS_ERROR                           = 0x001U,    /*!< Generic operation failure status */
    STATUS_BUSY                            = 0x002U,    /*!< Generic operation busy status */
    STATUS_TIMEOUT                         = 0x003U,    /*!< Generic operation timeout status */
    STATUS_UNSUPPORTED                     = 0x004U,    /*!< Generic operation unsupported status */
}status_t;

/**
  * @brief Core Platform Miscellaneous Control Module (MCM)
  */

typedef struct {                                /*!< (@ 0xE008000C) MCM Structure                                              */
  __IOM uint32_t  MCPCR;                        /*!< (@ 0x00000000) MCM Core Platform Control Register                         */
  __IOM uint32_t  MISCR;                        /*!< (@ 0x00000004) MCM Interrupt Status and Control Register                  */
  __IM  uint32_t  RESERVED[251];
  __IOM uint32_t  MLMDR0;                       /*!< (@ 0x000003F4) MCM Local MCM Local Memory Descriptor Register0            */
  __IM  uint32_t  RESERVED1;
  __IOM uint32_t  MLMDR1;                       /*!< (@ 0x000003FC) MCM Local MCM Local Memory Descriptor Register1            */
  __IOM uint32_t  MCPECR;                       /*!< (@ 0x00000400) MCM Cache Parity Enable Control Register                   */
  __IOM uint32_t  MCPESR;                       /*!< (@ 0x00000404) MCM Cache Parity Error Status Register                     */
  __IM  uint32_t  MCPEAR;                       /*!< (@ 0x00000408) MCM Cache Parity Error Address Register                    */
  __IOM uint32_t  MCCR;                         /*!< (@ 0x0000040C) MCM Cache Control Register                                 */
  __IM  uint32_t  RESERVED2[25];
  __IOM uint32_t  MNCR;                         /*!< (@ 0x00000474) MCM NMI Control Register                                   */
} MCM_Type;

#define FLASH_BASE                  0x40002000UL

#define FLASH                      ((FLASH_Type*)             FLASH_BASE)

#define FLASH_UNLOCK_KEY1          (0xac7840UL)
#define FLASH_UNLOCK_KEY2          (0x01234567UL)

#define FLASH_STAT_EMEMRDY_Pos            (0UL)                     /*!< EMEMRDY (Bit 0)                                       */
#define FLASH_STAT_EMEMRDY_Msk            (0x1UL)                   /*!< EMEMRDY (Bitfield-Mask: 0x01)                         */
#define FLASH_STAT_RAMRDY_Pos             (1UL)                     /*!< RAMRDY (Bit 1)                                        */
#define FLASH_STAT_RAMRDY_Msk             (0x2UL)                   /*!< RAMRDY (Bitfield-Mask: 0x01)                          */
#define FLASH_STAT_BDKERR_Pos             (2UL)                     /*!< BDKERR (Bit 2)                                        */
#define FLASH_STAT_BDKERR_Msk             (0x4UL)                   /*!< BDKERR (Bitfield-Mask: 0x01)                          */
#define FLASH_STAT_DFRDY_Pos              (3UL)                     /*!< DFRDY (Bit 3)                                         */
#define FLASH_STAT_DFRDY_Msk              (0x8UL)                   /*!< DFRDY (Bitfield-Mask: 0x01)                           */
#define FLASH_STAT_FRAMECC1F_Pos          (6UL)                     /*!< FRAMECC1F (Bit 6)                                     */
#define FLASH_STAT_FRAMECC1F_Msk          (0x40UL)                  /*!< FRAMECC1F (Bitfield-Mask: 0x01)                       */
#define FLASH_STAT_FRAMECC2F_Pos          (7UL)                     /*!< FRAMECC2F (Bit 7)                                     */
#define FLASH_STAT_FRAMECC2F_Msk          (0x80UL)                  /*!< FRAMECC2F (Bitfield-Mask: 0x01)                       */
#define FLASH_STAT_DFDIF_Pos              (8UL)                     /*!< DFDIF (Bit 8)                                         */
#define FLASH_STAT_DFDIF_Msk              (0x100UL)                 /*!< DFDIF (Bitfield-Mask: 0x01)                           */
#define FLASH_STAT_PVIOLF_Pos             (9UL)                     /*!< PVIOLF (Bit 9)                                        */
#define FLASH_STAT_PVIOLF_Msk             (0x200UL)                 /*!< PVIOLF (Bitfield-Mask: 0x01)                          */
#define FLASH_STAT_VERIFYERR_Pos          (10UL)                    /*!< VERIFYERR (Bit 10)                                    */
#define FLASH_STAT_VERIFYERR_Msk          (0x400UL)                 /*!< VERIFYERR (Bitfield-Mask: 0x01)                       */
#define FLASH_STAT_ACCERRF_Pos            (11UL)                    /*!< ACCERRF (Bit 11)                                      */
#define FLASH_STAT_ACCERRF_Msk            (0x800UL)                 /*!< ACCERRF (Bitfield-Mask: 0x01)                         */
#define FLASH_STAT_COLLERRF_Pos           (12UL)                    /*!< COLLERRF (Bit 12)                                     */
#define FLASH_STAT_COLLERRF_Msk           (0x1000UL)                /*!< COLLERRF (Bitfield-Mask: 0x01)                        */
#define FLASH_STAT_CCIF_Pos               (13UL)                    /*!< CCIF (Bit 13)                                         */
#define FLASH_STAT_CCIF_Msk               (0x2000UL)                /*!< CCIF (Bitfield-Mask: 0x01)                            */
#define FLASH_STAT_LOCK_Pos               (14UL)                    /*!< LOCK (Bit 14)                                         */
#define FLASH_STAT_LOCK_Msk               (0x4000UL)                /*!< LOCK (Bitfield-Mask: 0x01)                            */
/* ==========================================================  SEC  ========================================================== */
#define FLASH_SEC_RDPROT_Pos              (8UL)                     /*!< RDPROT (Bit 8)                                        */
#define FLASH_SEC_RDPROT_Msk              (0x300UL)                 /*!< RDPROT (Bitfield-Mask: 0x03)                          */
#define FLASH_SEC_EAUEN_Pos               (10UL)                    /*!< EAUEN (Bit 10)                                        */
#define FLASH_SEC_EAUEN_Msk               (0xc00UL)                 /*!< EAUEN (Bitfield-Mask: 0x03)                           */
#define FLASH_SEC_BDKEN_Pos               (12UL)                    /*!< BDKEN (Bit 12)                                        */
#define FLASH_SEC_BDKEN_Msk               (0x3000UL)                /*!< BDKEN (Bitfield-Mask: 0x03)                           */
#define FLASH_SEC_GRANTKEYEN_Pos          (14UL)                    /*!< GRANTKEYEN (Bit 14)                                   */
#define FLASH_SEC_GRANTKEYEN_Msk          (0xc000UL)                /*!< GRANTKEYEN (Bitfield-Mask: 0x03)                      */
/* ========================================================  CSESTAT  ======================================================== */
#define FLASH_CSESTAT_BSY_Pos             (0UL)                     /*!< BSY (Bit 0)                                           */
#define FLASH_CSESTAT_BSY_Msk             (0x1UL)                   /*!< BSY (Bitfield-Mask: 0x01)                             */
#define FLASH_CSESTAT_SB_Pos              (1UL)                     /*!< SB (Bit 1)                                            */
#define FLASH_CSESTAT_SB_Msk              (0x2UL)                   /*!< SB (Bitfield-Mask: 0x01)                              */
#define FLASH_CSESTAT_Bin_Pos             (2UL)                     /*!< Bin (Bit 2)                                           */
#define FLASH_CSESTAT_Bin_Msk             (0x4UL)                   /*!< Bin (Bitfield-Mask: 0x01)                             */
#define FLASH_CSESTAT_BFN_Pos             (3UL)                     /*!< BFN (Bit 3)                                           */
#define FLASH_CSESTAT_BFN_Msk             (0x8UL)                   /*!< BFN (Bitfield-Mask: 0x01)                             */
#define FLASH_CSESTAT_BOK_Pos             (4UL)                     /*!< BOK (Bit 4)                                           */
#define FLASH_CSESTAT_BOK_Msk             (0x10UL)                  /*!< BOK (Bitfield-Mask: 0x01)                             */
#define FLASH_CSESTAT_RIN_Pos             (5UL)                     /*!< RIN (Bit 5)                                           */
#define FLASH_CSESTAT_RIN_Msk             (0x20UL)                  /*!< RIN (Bitfield-Mask: 0x01)                             */
#define FLASH_CSESTAT_EDB_Pos             (6UL)                     /*!< EDB (Bit 6)                                           */
#define FLASH_CSESTAT_EDB_Msk             (0x40UL)                  /*!< EDB (Bitfield-Mask: 0x01)                             */
#define FLASH_CSESTAT_IDB_Pos             (7UL)                     /*!< IDB (Bit 7)                                           */
#define FLASH_CSESTAT_IDB_Msk             (0x80UL)                  /*!< IDB (Bitfield-Mask: 0x01)                             */
/* ========================================================  KEYUNLK  ======================================================== */
#define FLASH_KEYUNLK_KEY_Pos             (0UL)                     /*!< KEY (Bit 0)                                           */
#define FLASH_KEYUNLK_KEY_Msk             (0xffffffffUL)            /*!< KEY (Bitfield-Mask: 0xffffffff)                       */
/* =========================================================  CNFG  ========================================================== */
#define FLASH_CNFG_DFDIE_Pos              (0UL)                     /*!< DFDIE (Bit 0)                                         */
#define FLASH_CNFG_DFDIE_Msk              (0x1UL)                   /*!< DFDIE (Bitfield-Mask: 0x01)                           */
#define FLASH_CNFG_COLLE_Pos              (1UL)                     /*!< RDCOLLE (Bit 1)                                       */
#define FLASH_CNFG_COLLE_Msk              (0x2UL)                   /*!< RDCOLLE (Bitfield-Mask: 0x01)                         */
#define FLASH_CNFG_CCIE_Pos               (2UL)                     /*!< CCIE (Bit 2)                                          */
#define FLASH_CNFG_CCIE_Msk               (0x4UL)                   /*!< CCIE (Bitfield-Mask: 0x01)                            */
#define FLASH_CNFG_EMDFIE_Pos             (4UL)                     /*!< EMDFIE (Bit 4)                                        */
#define FLASH_CNFG_EMDFIE_Msk             (0x10UL)                  /*!< EMDFIE (Bitfield-Mask: 0x01)                          */
#define FLASH_CNFG_PERABORT_Pos           (7UL)                     /*!< PERABORT (Bit 7)                                      */
#define FLASH_CNFG_PERABORT_Msk           (0x80UL)                  /*!< PERABORT (Bitfield-Mask: 0x01)                        */
#define FLASH_CNFG_CLKFREQ_Pos            (8UL)                     /*!< CLKFREQ (Bit 8)                                       */
#define FLASH_CNFG_CLKFREQ_Msk            (0xff00UL)                /*!< CLKFREQ (Bitfield-Mask: 0xff)                         */
/* ==========================================================  CMD  ========================================================== */
#define FLASH_CMD_CMD_Pos                 (0UL)                     /*!< CMD (Bit 0)                                           */
#define FLASH_CMD_CMD_Msk                 (0xffffffffUL)            /*!< CMD (Bitfield-Mask: 0xffffffff)                       */
/* =========================================================  ADDR  ========================================================== */
#define FLASH_ADDR_ADDR_Pos               (0UL)                     /*!< ADDR (Bit 0)                                          */
#define FLASH_ADDR_ADDR_Msk               (0xffffffffUL)            /*!< ADDR (Bitfield-Mask: 0xffffffff)                      */
/* =========================================================  DATA0  ========================================================= */
#define FLASH_DATA0_DATA0_Pos             (0UL)                     /*!< DATA0 (Bit 0)                                         */
#define FLASH_DATA0_DATA0_Msk             (0xffffffffUL)            /*!< DATA0 (Bitfield-Mask: 0xffffffff)                     */
/* =========================================================  DATA1  ========================================================= */
#define FLASH_DATA1_DATA1_Pos             (0UL)                     /*!< DATA1 (Bit 0)                                         */
#define FLASH_DATA1_DATA1_Msk             (0xffffffffUL)            /*!< DATA1 (Bitfield-Mask: 0xffffffff)                     */
/* ==========================================================  LEN  ========================================================== */
#define FLASH_LEN_LEN_Pos                 (0UL)                     /*!< LEN (Bit 0)                                           */
#define FLASH_LEN_LEN_Msk                 (0xffffffffUL)            /*!< LEN (Bitfield-Mask: 0xffffffff)                       */
/* ==========================================================  CST  ========================================================== */
#define FLASH_CST_START_Pos               (0UL)                     /*!< START (Bit 0)                                         */
#define FLASH_CST_START_Msk               (0x1UL)                   /*!< START (Bitfield-Mask: 0x01)                           */
/* =========================================================  PPROT  ========================================================= */
#define FLASH_PPROT_PPROT_Pos             (0UL)                     /*!< PPROT (Bit 0)                                         */
#define FLASH_PPROT_PPROT_Msk             (0xffffffffUL)            /*!< PPROT (Bitfield-Mask: 0xffffffff)                     */
/* =========================================================  DPROT  ========================================================= */
#define FLASH_DPROT_DPROT_Pos             (0UL)                     /*!< DPROT (Bit 0)                                         */
#define FLASH_DPROT_DPROT_Msk             (0xffUL)                  /*!< DPROT (Bitfield-Mask: 0xff)                           */
/* =========================================================  EPROT  ========================================================= */
#define FLASH_EPROT_EPROT_Pos             (0UL)                     /*!< EPROT (Bit 0)                                         */
#define FLASH_EPROT_EPROT_Msk             (0xffUL)                  /*!< EPROT (Bitfield-Mask: 0xff)                           */
/* =========================================================  DFADR  ========================================================= */
#define FLASH_DFADR_DFADR_Pos             (0UL)                     /*!< DFADR (Bit 0)                                         */
#define FLASH_DFADR_DFADR_Msk             (0xffffffffUL)            /*!< DFADR (Bitfield-Mask: 0xffffffff)                     */
/* =========================================================  PART  ========================================================== */
#define FLASH_PART_DPART_Pos              (0UL)                     /*!< DPART (Bit 0)                                         */
#define FLASH_PART_DPART_Msk              (0xfUL)                   /*!< DPART (Bitfield-Mask: 0x0f)                           */
#define FLASH_PART_EPART_Pos              (4UL)                     /*!< EPART (Bit 4)                                         */
#define FLASH_PART_EPART_Msk              (0xf0UL)                  /*!< EPART (Bitfield-Mask: 0x0f)                           */
#define FLASH_PART_SFE_Pos                (8UL)                     /*!< SFE (Bit 8)                                           */
#define FLASH_PART_SFE_Msk                (0xff00UL)                /*!< SFE (Bitfield-Mask: 0xff)                             */
#define FLASH_PART_CSEKEYSIZE_Pos         (16UL)                    /*!< CSEKEYSIZE (Bit 16)                                   */
#define FLASH_PART_CSEKEYSIZE_Msk         (0x30000UL)               /*!< CSEKEYSIZE (Bitfield-Mask: 0x03)                      */

/**
* @brief setting bits macro.
*/
#ifndef SET_BIT32
  #define SET_BIT32(reg, mask)              ((reg) |= (uint32_t)(mask))
#endif

/**
* @brief clearing bits macro.
*/
#ifndef CLEAR_BIT32
  #define CLEAR_BIT32(reg, mask)            ((reg) &= (~((uint32_t)(mask))))
#endif

#define MCM_MCCR_CADIS_Msk                (0x1UL)                   /*!< CADIS (Bitfield-Mask: 0x01)                           */
#define MCM_BASE                    0xE008000CUL
#define MCM                         ((MCM_Type*)               MCM_BASE)

//#define	STATUS_SUCCESS	0x00    /*!< Generic operation success status */
//#define STATUS_ERROR    0x01    /*!< Generic operation failure status */

/*!< FLASH status error bits */
#define FLASH_STAT_ERROR_BITS                   (FLASH_STAT_DFDIF_Msk | FLASH_STAT_PVIOLF_Msk | \
                                                FLASH_STAT_VERIFYERR_Msk | FLASH_STAT_ACCERRF_Msk | \
                                                FLASH_STAT_COLLERRF_Msk)


/*!< Clear FLASH error bits */
static inline void  FLASH_CLEAR_STAT_ERROR_BITS(void)
{
	FLASH->STAT |= FLASH_STAT_ERROR_BITS;
}

/*!
 * @brief Set FLASH operation command.
 *
 * param[in] cmd: FLASH/eMemory command
 * @return none
 */
static inline void FLASH_SetCommand(flash_command_t cmd)
{
    FLASH->CMD = (uint32_t)cmd;
}

static inline void FLASH_SetKey(uint32_t keyValue)
{
    FLASH->KEYUNLK = keyValue;
}

static inline uint8_t FLASH_GetCmdCompleteStatus(void)
{
    return (uint8_t)((FLASH->STAT & FLASH_STAT_CCIF_Msk) >> FLASH_STAT_CCIF_Pos);
}
/*!
 * @brief Get the flash controler lock status.
 *
 * param[in] none
 * @return 0: Flash control is unlocked
 *         1: Flash control is locked
 */
static inline uint8_t FLASH_GetLockStatus(void)
{
    return (uint8_t)((FLASH->STAT & FLASH_STAT_LOCK_Msk) >> FLASH_STAT_LOCK_Pos);
}

/*!
 * @brief Set FLASH operation start address.
 *
 * @param[in] addr: start address
 * @return none
 */
static inline void FLASH_SetAddress(uint32_t addr)
{
    FLASH->ADDR = addr;
}

/*!
 * @brief Set FLASH operation length in 64-bit.
 *
 * @param[in] len: program/erase length
 * @return none
 */
static inline void FLASH_SetLength(uint32_t len)
{
    FLASH->LEN = len;
}


/*!
 * @brief Get the error status.
 *
 * @param[in] none
 * @return status value
 */
static inline uint32_t FLASH_GetStatus(void)
{
    return (FLASH->STAT & FLASH_STAT_ERROR_BITS);
}

/*!
 * @brief Set low 32-bit data when program flash.
 *
 * param[in] data: The low 32-bit data
 * @return none
 */
static inline void FLASH_SetLowData(uint32_t data)
{
    FLASH->DATA0 = data;
}

/*!
 * @brief Set high 32-bit data when program flash.
 *
* param[in] data: The high 32-bit data
 * @return none
 */
static inline void FLASH_SetHighData(uint32_t data)
{
    FLASH->DATA1 = data;
}

/*!
 * @brief Trigger the FLASH operation command to execute.
 *
 * @param[in] none
 * @return none
 */
static inline void FLASH_TrigCmdExecute(void)
{
    FLASH->CST = FLASH_CST_START_Msk;
}

/*!
 * @brief Get Trigger the FLASH operation command execute status.
 *
 * @param[in] none
 * @return Triggrt command enable bit value
 */
static inline uint8_t FLASH_GetTrigCmdExecuteStatus(void)
{
    return (uint8_t)(FLASH->CST & FLASH_CST_START_Msk);
}
#ifdef __cplusplus
}
#endif

#endif /*__AC784X_FLASH_DEV_H__*/

